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TetraMem

Design Verification Engineer

TetraMem

Posted

2 days ago

Singapore, Singapore

Onsite

SGD 6K

Full Time

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Sema

Sema Summary

The Design Verification Engineer role at TetraMem involves ensuring the correctness of ASIC and SoC designs in Singapore. This position requires deep knowledge of verification methodologies and tools, as well as collaboration with design engineers. Suitable candidates should have a strong foundation in digital design and be prepared to work on-site. Despite the absence of a specified salary, an estimated pay range for this role in Singapore is around SGD6000 per month.

About Company

TetraMem specializes in innovative ASIC design and verification solutions. The company is committed to accelerating technological advancements in the semiconductor industry.

Core Requirements

  • Bachelor's degree in Electrical Engineering
  • Experience in ASIC design
  • Understanding of digital verification methodologies
  • Familiarity with simulation tools
  • Strong analytical skills

Responsibilities

  • Develop test plans for designs
  • Implement verification environments
  • Execute verification tests
  • Collaborate with design teams
  • Identify and debug design issues
  • Document verification results
  • Ensure compliance with specifications

Must Have skills

Verification methodsDigital design knowledgeProblem-solvingTeam collaborationCommunication skills

Nice To Have Skills

Scripting skillsFamiliarity with SystemVerilogKnowledge of UVMExperience with emulation toolsProject management

Tools Knowledge Requried

SystemVerilogUVMSimulation toolsVerification environmentsScripting languages

Job Keywords

ASICDesign VerificationEngineeringDigital DesignMethodologies

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