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ASIC DFT Engineer
Cisco
Posted
last week

Greater Hyderabad Area

Onsite

INR 100K

Mid Level

Full Time

Job Categories

Engineering Hardware Design Testing Development

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Sema Summary

The ASIC DFT Engineer will be responsible for implementing Hardware Design-for-Test features that support the design's testing and diagnostics. This role requires collaboration across teams to ensure integration and validation of test logic in the hardware design process.

About Company

Cisco is a technology leader revolutionizing how organizations connect and protect in the AI era, committed to innovation and creating a more connected future.

Core Requirements

Bachelor's or Master’s Degree in Electrical or Computer Engineering
8-10 years of experience in ASIC design
Knowledge of DFT, test, and silicon engineering
Experience with Jtag protocols, Scan insertion, and ATPG
Scripting skills in Tcl and Python/Perl

Responsibilities

Implement Hardware Design-for-Test features
Develop DFT IP in collaboration with teams
Enable integration of test logic in design phases
Work on debugging and solutions with minimal mentorship
Coordinate with validation flows post silicon integration
Utilize EDA tools for testing and validation
Collaborate with multiple teams to achieve design objectives

Must Have skills

Design-for-Test knowledgeDebugging skillsProficiency with EDA toolsStrong verbal communicationAbility to work in a team environment

Job Keywords

ASICDFTHardware EngineeringSilicon ValidationDebuggingTesting

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